{"id":38,"date":"2021-08-20T16:42:17","date_gmt":"2021-08-20T16:42:17","guid":{"rendered":"https:\/\/sites.tntech.edu\/shasan\/?page_id=38"},"modified":"2025-09-08T19:36:11","modified_gmt":"2025-09-08T19:36:11","slug":"my-publications","status":"publish","type":"page","link":"https:\/\/sites.tntech.edu\/shasan\/my-publications\/","title":{"rendered":"My Publications"},"content":{"rendered":"\n<p><\/p>\n\n\n\n<p class=\"has-vivid-cyan-blue-color has-text-color\"><strong>Refereed Journal Articles:<\/strong><\/p>\n\n\n\n<p class=\"has-black-color has-text-color\"><\/p>\n\n\n\n<p><\/p>\n\n\n\n<ol style=\"list-style-type:1\" class=\"wp-block-list\">\n<li>A. Solanki, W. Al Amiri, M. Mahmoud, B. Swieder, <strong><em>S. R. Hasan<\/em><\/strong>, and T. N. Guo. &#8220;Survey of Navigational Perception Sensors\u2019 Security in Autonomous Vehicles.&#8221; IEEE Access (2025) &#8211; DOI: 10.1109\/ACCESS.2025.3578891<\/li>\n\n\n\n<li>M. Asif, M. K. Kazmi, M. A. Rahman, <strong><em>S. R. Hasan<\/em><\/strong> and S. Homsi, &#8220;SHEATH: Defending Horizontal Collaboration for Distributed CNNs Against Adversarial Noise,&#8221; in IEEE Transactions on Information Forensics and Security, vol. 20, pp. 4353-4368, 2025, doi: 10.1109\/TIFS.2025.3556349.<\/li>\n\n\n\n<li>A. Shafee, <strong><em>S. R. Hasan,<\/em><\/strong> T. A. Awaad, \u201cPrivacy and security vulnerabilities in edge intelligence: An analysis and countermeasures\u201d, in Elsevier\u2019s Computer and Electrical Engineering, Volume 123, Part B, 2025, 110146, ISSN 0045-7906, <a href=\"https:\/\/doi.org\/10.1016\/j.compeleceng.2025.110146\">https:\/\/doi.org\/10.1016\/j.compeleceng.2025.110146<\/a>.<\/li>\n\n\n\n<li>Adewale Adeyemo, P. Patel, S. R. Hasan, M. A. Rahman, S. Homsi, \u201cSecuring Pseudo-Model Parallelism-based Collaborative DNN &nbsp;Inference for Edge Devices\u201d,&nbsp; accepted for publication in IEEE Access.<\/li>\n\n\n\n<li>A. A. Adeyemo, J. J. Sanderson, T. A. Odetola, F. Khalid and<strong><em> S. R. Hasan,<\/em><\/strong> &#8220;StAIn: Stealthy Avenues of Attacks on Horizontally Collaborated Convolutional Neural Network Inference and Their Mitigation,&#8221; in IEEE Access, vol. 11, pp. 10520-10534, 2023, doi: 10.1109\/ACCESS.2023.3241096.<\/li>\n\n\n\n<li>Tolulope A. Odetola, Adewale Adeyemo, Faiq Khalid, and <strong><em>Syed Rafay Hasan,<\/em><\/strong> \u201cFM-ModComp: Feature Map Modification and Hardware-Software Co-Comparison for Secure Hardware Accelerator-based CNN Inference\u201d, Elsevier\u2019s Microprocessors and Microsystems (in press).<\/li>\n\n\n\n<li>Si, Haijun, Zhicheng Zhang, Orkhan Huseynov, Ismail Fidan, <strong><em>Syed Rafay Hasan,<\/em><\/strong> and Mohamed Mahmoud. 2023. &#8220;Machine Learning-Based Investigation of the 3D Printer Cooling Effect on Print Quality in Fused Filament Fabrication: A Cybersecurity Perspective&#8221; Inventions 8, no. 1: 24. https:\/\/doi.org\/10.3390\/inventions8010024<\/li>\n\n\n\n<li>T. Odetola, K. Groves, Y. Mohammed, F. Khalid, <strong><em>S. R. Hasan, <\/em><\/strong>\u201c2L-3W: 2-Level 3-Way Hardware-Software Co-Verification for the Mapping of Convolutional Neural Network (CNN) onto FPGA Boards\u201d, Springer Nature Journal of Computer Science, January 2022.<\/li>\n\n\n\n<li>T. Odetola, F. Khalid, T. Sandefur, H. Mohammed, and <strong><em>S. R. Hasan,<\/em><\/strong> &#8220;FeSHI: Feature Map Based Stealthy Hardware Intrinsic Attack&#8221;, IEEE Access, 2021 (in press) DOI: 10.1109\/ACCESS.2021.3104520<\/li>\n\n\n\n<li>F. Khalid, <strong><em>S. R. Hasan<\/em><\/strong>, S. Zia, O. Hasan, F. Awwad, M. Shafique, &#8220;MacLeR: Machine Learning-based Run-Time Hardware Trojan Detection in Resource Constrained IoT Edge Devices&#8221;, IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems, Vol. 39, Issue 11, 11\/2020; <strong>DOI:&nbsp;<\/strong><a href=\"https:\/\/doi.org\/10.1109\/TCAD.2020.3012236\">10.1109\/TCAD.2020.3012236<\/a><\/li>\n\n\n\n<li>F. Khalid, <strong><em>S. R. Hasan<\/em><\/strong>, O. Hasan, M. Shafique &#8220;SIMCom: Statistical Sniffing of Inter-Module Communications for Runtime Hardware Trojan Detection&#8221; Elsevier&#8217;s Microprocessors and Microsystems Journal, September 2020 &#8211; <a href=\"https:\/\/doi.org\/10.1016\/j.micpro.2020.103122\">https:\/\/doi.org\/10.1016\/j.micpro.2020.103122<\/a><\/li>\n\n\n\n<li>W. Ahmad, O. Hasan, F. Awwad, N. Bastaki, S. R. Hasan, &#8221; Formal Reliability Analysis of an Integrated Power Generation System Using Theorem Proving&#8221;, IEEE Systems Journal, 2020 (in press) &#8211; DOI: 10.1109\/JSYST.2020.2970107<\/li>\n\n\n\n<li>H. Mohammed, <strong><em>S. R. Hassan<\/em><\/strong>, F. Awwad, &#8220;FusIon: On-Field Security and Privacy Preservation for IoT Edge Devices: Concurrent Defense Against Multiple types of Hardware Trojan Attacks&#8221; IEEE Access, 2020 &nbsp;DOI: 10.1109\/ACCESS.2020.2975016<\/li>\n\n\n\n<li>M. T.&nbsp;Hailesellasie,&nbsp;<strong><em>S. R. Hasan,&nbsp;<\/em><\/strong>&#8220;MulNet: A Flexible CNN Processor with Higher Resource Utilization Efficiency for Constrained Devices&#8221; &nbsp;IEEE Access, Vol. 7, pp. 47509-47524, December 2019, <a href=\"http:\/\/ieeexplore.ieee.org\/xpl\/articleDetails.jsp?arnumber=8680748&amp;source=authoralert\">10.1109\/ACCESS.2019.2907865<\/a><\/li>\n\n\n\n<li>E. Oriero, <strong><em>S. R. Hasan<\/em><\/strong>, \u201cSurvey on Recent Counterfeit IC Detection Techniques and Future Research Directions\u201d Integration, The VLSI Journal, Vol. 66, pp. 135 \u2013 152, May 2019, <a href=\"https:\/\/doi.org\/10.1016\/j.vlsi.2019.02.006\">https:\/\/doi.org\/10.1016\/j.vlsi.2019.02.006<\/a><\/li>\n\n\n\n<li>A. Ahmed, O. Hasan, F. Awwad, N. Bastaki, <strong><em>S. R. Hasan<\/em><\/strong>, &#8220;Formal Asymptotic Analysis of Online Scheduling Algorithm for Plug-in Electric Vehicles&#8217; Charging&#8221;<em> Energies<\/em>&nbsp;12, no. 1 (2019): 19 <a href=\"https:\/\/doi.org\/10.3390\/en12010019\"><strong>https:\/\/doi.org\/10.3390\/en12010019<\/strong><\/a><\/li>\n\n\n\n<li>F. K. Lodhi, <strong><em>S. R. Hasan<\/em><\/strong>, O. Hasan, F. Awwad, &#8220;Runtime Hardware Trojan Monitors Though Modeling Burst Mode Communication using Formal Verification&#8221;, Integration, The VLSI Journal, Vol. 61, pp. 62-76, March 2018, <a href=\"https:\/\/doi.org\/10.1016\/j.vlsi.2017.11.003\">https:\/\/doi.org\/10.1016\/j.vlsi.2017.11.003<\/a><\/li>\n\n\n\n<li>M. T. Hailesellasie, <strong><em>S. R. Hasan<\/em><\/strong>, &#8220;Intrusion Detection in PLC Based Industrial Controls Systems Using Formal Model of the System in Conjunction with Graphs&#8221;, Journal of Hardware and Systems Security, Vol. 2, Issue 1,&nbsp; pp. 1-14, March, 2018 <a href=\"https:\/\/link.springer.com\/article\/10.1007\/s41635-017-0017-y\">https:\/\/link.springer.com\/article\/10.1007\/s41635-017-0017-y<\/a>)<\/li>\n\n\n\n<li>S. F. Mossa, <strong><em>S. R. Hasan<\/em><\/strong>, O. S. A. Elkeelany, &#8220;Hardware Trojans in 3-D ICs Due to NBTI Effects and Countermeasure&#8221;, Integration, the VLSI Journal, Vol. 59, pp. 64 &#8211; 74, September, 2017. DOI: <a href=\"http:\/\/dx.doi.org\/10.1016\/j.vlsi.2017.03.009\">http:\/\/dx.doi.org\/10.1016\/j.vlsi.2017.03.009<\/a><\/li>\n\n\n\n<li>S. F. Mossa, <strong><em>S. R. Hasan<\/em><\/strong>, O. S. A. Elkeelany, &#8220;Self-triggering Hardware Trojan: Due to NBTI Related Aging in 3-D ICs&#8221;, Integration, The VLSI Journal, Vol. 58, pp. 116 &#8211; 124, June, 2017&nbsp; DOI:&nbsp; <a href=\"http:\/\/dx.doi.org\/10.1016\/j.vlsi.2016.12.013\">http:\/\/dx.doi.org\/10.1016\/j.vlsi.2016.12.013<\/a><\/li>\n\n\n\n<li>F. K. Lodhi, <strong><em>S. R. Hasan<\/em><\/strong>, O. Hasan, F. Awwad, &#8220;Analyzing Vulnerability of Asynchronous Pipeline to Soft Errors: Leveraging Formal Verification&#8221;, Journal of Electronics Testing Theory and Applications (JETTA), Vol. 32, No. 5, October 2016, pp. 569-86 <a href=\"https:\/\/doi.org\/10.1007\/s10836-016-5619-8\">https:\/\/doi.org\/10.1007\/s10836-016-5619-8<\/a><\/li>\n\n\n\n<li>S. F. Mossa,<strong><em>S. R. Hasan<\/em><\/strong><em>, <\/em>O. S. A. Elkeelany, &#8220;Grouped TSV for Lower Ldi\/dt drop in 3-D IC&#8221;, IET Circuits, Devices and Systems, January 2016 <a href=\"https:\/\/doi.org\/10.1049\/iet-cds.2015.0065\"><strong>https:\/\/doi.org\/10.1049\/iet-cds.2015.0065<\/strong><\/a><\/li>\n\n\n\n<li><strong><em>S. R. Hasan,<\/em><\/strong> W.Gul, O. Hasan, &#8221; Clock Domain Crossing (CDC) in 3D-SICs: Semi QDI Asynchronous vs Loosely Synchronous&#8221;,&nbsp;Integration, the VLSI journal, January 2016 <a href=\"https:\/\/doi.org\/10.1016\/j.vlsi.2015.05.002\">https:\/\/doi.org\/10.1016\/j.vlsi.2015.05.002<\/a><\/li>\n\n\n\n<li>G. B. Hamad<strong>, <em>S. R. Hasan<\/em><\/strong><em>,<\/em> O. A. Mohamed, Y. Savaria, \u201cCharacterizing, modeling and analyzing soft-error propagation in asynchronous and synchronous digital circuits\u201d, Elsevier\u2019s Microelectronics Reliability 55, no. 1, 2015, pp. 238-250 &nbsp;<a href=\"https:\/\/doi.org\/10.1016\/j.microrel.2014.09.025\">https:\/\/doi.org\/10.1016\/j.microrel.2014.09.025<\/a><\/li>\n\n\n\n<li>G. B. Hamad, <strong><em>S. R. Hasan<\/em><\/strong><em>,<\/em> O. A. Mohamed, Y. Savaria, \u201c<em>New Insights Into the Single Event Transient Propagation Through Static and TSPC Logic<\/em>&#8220;, IEEE Transaction on Nuclear Science, Vol. 61, No. 4, August&nbsp;2014, pp. 1618 &#8211; 1627&nbsp;&#8211; <strong>DOI: <\/strong><a href=\"https:\/\/doi.org\/10.1109\/TNS.2014.2305434\">10.1109\/TNS.2014.2305434<\/a><\/li>\n\n\n\n<li>F.&nbsp; K. Lodhi, <strong><em>S. R. Hasan<\/em><\/strong>, N. Sharif, N. Ramzan and O. Hasan, \u201c<em>Timing Variation Aware Dynamic Digital Phase Detector for Low Latency Clock Domain Crossing\u201d<\/em>, IET Circuits, Devices &amp; Systems, &nbsp;Jan, 2014, pp. 58 \u2013 64&nbsp; DOI: <a href=\"http:\/\/dx.doi.org\/10.1049\/iet-cds.2013.0067\">10.1049\/iet-cds.2013.0067<\/a><\/li>\n\n\n\n<li>C. Thibeault, Y. Hariri, <strong><em>S.R. Hasan<\/em><\/strong>, Y. Savaria, Y. Audet, and F.Z. Tazi, \u201c<em>A Library-Based Early Soft Error Rate Estimation Technique for SRAM-based FPGA Design<\/em>\u201d, Springer\u2019s Journal of Electronics Testing Theory and Applications (JETTA), Vol. 29., No. 4, August, 2013, pp. &nbsp;457 \u2013 471 DOI: <a href=\"http:\/\/dx.doi.org\/10.1007\/s10836-013-5393-9\">10.1007\/s10836-013-5393-9<\/a><\/li>\n\n\n\n<li><strong><em>S. R. Hasan<\/em><\/strong>, N. Belanger, Y. Savaria, M. O. Ahmad, \u201cAll digital skew tolerant synchronous interfacing methods for high-performance point-to-point communications in deep sub-micron SoCs\u201d, Elsevier\u2019s Integration, the VLSI journal, Vol. 44, No. 1,&nbsp;January, 2011, pp. 22 \u2013 38 <a href=\"https:\/\/doi.org\/10.1016\/j.vlsi.2010.05.003\">https:\/\/doi.org\/10.1016\/j.vlsi.2010.05.003<\/a><\/li>\n\n\n\n<li><strong><em>S. R. Hasan<\/em><\/strong>, N. Belanger, Y. Savaria, M. O. Ahmad, \u201cCrosstalk glitch gating: a solution for designing glitch tolerant asynchronous handshake scheme for GALS systems\u201d, IEEE Transaction on Circuits and Systems Part I (TCAS-I), Vol. 57, No. 10, October 2010, pp. 2696 \u2013 2707 &nbsp;&#8211; <a href=\"https:\/\/doi.org\/10.1109\/TCSI.2010.2046981\">https:\/\/doi.org\/10.1109\/TCSI.2010.2046981<\/a><\/li>\n\n\n\n<li><strong><em>S. R. Hasan<\/em><\/strong>, N. Belanger, Y. Savaria, M. O. Ahmad, \u201cCrosstalk glitch propagation modeling for asynchronous interfaces in globally asynchronous locally synchronous systems\u201d, IEEE Transaction on Circuits and Systems Part I (TCAS-I), Vol. 57, No. 8, August 2010, pp. 2020 \u2013 2031 <strong>DOI: <\/strong><a href=\"https:\/\/doi.org\/10.1109\/TCSI.2009.2038553\">10.1109\/TCSI.2009.2038553<\/a><\/li>\n<\/ol>\n\n\n\n<p><strong>Listing of my Peer Reviewed Conference Papers:<\/strong><\/p>\n\n\n\n<ol style=\"list-style-type:1\" class=\"wp-block-list\">\n<li>M. Mahmoud, W. Al Amiri, T. N. Guo, and <strong><em>S. R. Hasan<\/em><\/strong>, \u201cQuickest Attempt Attack (QuAck) Against Randomized KF Innovations-based Detection in AVs with Integrated GPS-IMU\u201d, in IEEE 68th International Midwest Symposium on Circuits and Systems (MWSCAS)- August, 2025.<\/li>\n\n\n\n<li>T. Robertson, W. Al Amiri, A. Solanki, <strong><em>S. R. Hasan<\/em><\/strong>, and T. N. Guo, \u201cRealistic GPS Spoofing Via Customized CARLA GPS Navigation and Controller Systems\u201d, in IEEE 68th International Midwest Symposium on Circuits and Systems (MWSCAS)- August, 2025.<\/li>\n\n\n\n<li>A. Perkins, <strong><em>S. R. Hasan<\/em><\/strong>, W. Al Amiri \u201cTowards Achieving Moving Target Defense via Dynamically Changing the Layout of ROPUF\u201d, in IEEE 68th International Midwest Symposium on Circuits and Systems (MWSCAS)- August, 2025.<\/li>\n\n\n\n<li>C. Tai, W. Al Amiri, A. Solanki, D. A. Talbert, N. Guo, <strong><em>S. R. Hasan,<\/em><\/strong> \u201cTowards Trustworthy AI: Analyzing Model Uncertainty through MC Dropout and Noise Injection\u201d, in the 38th International Florida Artificial Intelligence Research Society Conference \u2013 FLAIRS-38, 2025.<\/li>\n\n\n\n<li>M. Elhanafy, S. Ravva, A. Solanki and <strong><em>S. R. Hasan<\/em><\/strong>, &#8220;Towards Machine Learning Based Fingerprinting of Ultrasonic Sensors,&#8221; SoutheastCon 2025, Concord, NC, USA, 2025, pp. 1332-1333, doi: 10.1109\/SoutheastCon56624.2025.10971545.Seconieee<\/li>\n\n\n\n<li>A. Solanki, L. Beirne, <strong><em>S. R. Hasan<\/em><\/strong> and W. Al Amiri, &#8220;ReAL: Machine Learning Detection of Reflective Attacks Against Lidarometry,&#8221; SoutheastCon 2025, Concord, NC, USA, 2025, pp. 1309-1313, doi: 10.1109\/SoutheastCon56624.2025.10971487.<\/li>\n\n\n\n<li>A. Solanki, R. T. Thornton, <strong><em>S. R. Hasan<\/em><\/strong> and U. Qidwai, &#8220;GNAPing On the Job: Attacking and Defending Facial Detection on Edge Devices,&#8221; SoutheastCon 2025, Concord, NC, USA, 2025, pp. 918-923, doi: 10.1109\/SoutheastCon56624.2025.10971676.<\/li>\n\n\n\n<li>Y. R. Martinez, C. Brady, A. Solanki, W. Al Amiri, <strong><em>S. R. Hasan<\/em><\/strong>, and T. N. Guo, \u201cMitigation of Camouflaged Adversarial Attacks in Autonomous Vehicles\u2013A Case Study Using CARLA Simulator\u201d, accepted for publication in &nbsp;2025 IEEE International Symposium on Circuits and Systems (ISCAS), &nbsp;2025.<\/li>\n\n\n\n<li>P. Patel, <strong><em>S. R. Hasan<\/em><\/strong>, M. A. Rahman, S. Homsi \u201cDetection and Mitigation of Subtle Feature-map Attacks in Pseudo Parallel Collaborative CNN Models for Distributed Edge Intelligence\u201d, Vehicular Technology Conference (VTC-2024).<\/li>\n\n\n\n<li>A. Solanki, <strong><em>S. R. Hasan<\/em><\/strong>, T. Guo, \u201cInvestigate the Effects of Laser Attack on Intelligence of the AV Perception\u201d, in International Symposium of VLSI Design (ISVLSI\u201924).<\/li>\n\n\n\n<li>J. Sanderson, and <strong><em>S. R. Hasan<\/em><\/strong>. &#8220;System Integration of Xilinx DPU and HDMI for Real-Time Inference in PYNQ Environment With Image Enhancement.&#8221; In 2024 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1-5. IEEE, 2024. <strong><em>(Best paper award &#8211; honorable mention &#8211; Multimedia Systems and Applications Technical Committee (MSA TC))<\/em><\/strong><\/li>\n\n\n\n<li>E. Oriero, F. Khalid, and <strong><em>S. R. Hasan<\/em><\/strong> 2023. DeMiST: Detection and Mitigation of Stealthy Analog Hardware Trojans. In Proceedings of the 12th International Workshop on Hardware and Architectural Support for Security and Privacy (HASP &#8217;23). Association for Computing Machinery, New York, NY, USA, 47\u201355. https:\/\/doi.org\/10.1145\/3623652.3623673<\/li>\n\n\n\n<li>J. Sanderson, <strong><em>S. R. Hasan<\/em><\/strong>, B. Abidi, M. Abidi \u201cIntegrating Gstreamer with Xilinx\u2019s ZCU 104 Edge Platform for Real-Time Intelligent Image Enhancement\u201d, in IEEE International MidWest Symposium on Circuits and Systems, August 2023.<\/li>\n\n\n\n<li>S. Sylvester, J. Sanderson, <strong><em>S. R. Hasan <\/em><\/strong>\u201cMitigation of Rowhammer Attack on DDR4 Memory: A Novel Multi-Table Frequent Element Algorithm Based Approach\u201d in IEEE International MidWest Symposium on Circuits and Systems, August 2023.<\/li>\n\n\n\n<li>A. Adeyemo and <strong><em>S. R. Hasan, <\/em><\/strong><em>\u201c<\/em>Enhancing the Security of Collaborative Deep Neural Networks: An Examination of the Effect of Low Pass Filters\u201d, accepted for publication in IEEE\/ACM Great Lake Symposium on VLSI, June 2023<\/li>\n\n\n\n<li>A. Hakiri, A. S. Gokhale, Y. Barve, V. Formicola, S. Shekhar, C. Mahmoudi, M. A. Rahman, U. Ghosh, S. R. Hasan, T. Guo &#8220;Techniques for Realizing Secure, Resilient and Differentiated 5G Operations,&#8221; 2022 14th IFIP Wireless and Mobile Networking Conference (WMNC), Sousse, Tunisia, 2022, pp. 113-117, doi: 10.23919\/WMNC56391.2022.9954310.<\/li>\n\n\n\n<li>T. Odetola, F. Khalid, <strong><em>S. R. Hasan, <\/em><\/strong>\u201cLaBaNI: Layer-based Noise Injection Attack on Convolutional Neural Networks\u201d, in IEEE\/ACM Great Lake Symposium on VLSI, June 2022.<\/li>\n\n\n\n<li>J. Nelson, S. R. Hasan, \u201cCompressed Sparse Kernel: Optimization of Pruning for Customized CNNs on FPGAs\u201d, in IEEE International MidWest Symposium on Circuits and Systems, August 2022.<\/li>\n\n\n\n<li>T. Odetola, A. Adeyemo and <strong><em>S. R. Hasan,<\/em><\/strong> \u201cHardening Hardware Accelerator Based CNN Inference Phase against Adversarial Noises\u201d, in Work in Progress session of IEEE International Symposium of Hardware Oriented Security and Trust (HOST), June, 2022.<\/li>\n\n\n\n<li>T. N. Guo, H. Mohammed, <strong><em>S. R. Hasan,<\/em><\/strong>&nbsp; \u201cEdge Intelligence in Mobile Nodes: Opportunistic Pipeline via 5G D2D for On-site Sensing\u201d, in IEEE Vehicular Technology Conference 2022 Workshop on Edge-based AI Applications over B5G\/6G Evolution, June 2022.<\/li>\n\n\n\n<li>G. Cataloni, P. Sawyer, <strong><em>S. R. Hasan<\/em><\/strong>, \u201cA Primer on Hardware Trojans Including Platform Specific Attacks and Machine Learning for Detection\u201d, in IEEE SouthEast Conference, March, 2022.<\/li>\n\n\n\n<li>A. Adeyemo, T. A. Odetola, <strong><em>S. R. Hasan<\/em><\/strong> \u201cTowards Enabling Dynamic Convolution Neural Network Inference for Edge Intelligence\u201d, in IEEE International Symposium on Circuits and Systems\u2013ISCAS\u201922.<\/li>\n\n\n\n<li>T. Sandefur, <strong><em>S. R. Hasan <\/em><\/strong>\u201cFramework to Benchmark CNNs (FaBCNN) for Processing Real-Time HD Video Streams on FPGAs\u201d, in IEEE International Symposium on Circuits and Systems\u2013ISCAS\u201922.<\/li>\n\n\n\n<li>S. Iqbal, O. Hasan, S. R. Hasan, \u201cFormal Verification of Fault Isolation and Restoration Algorithms in Smart Grid\u201d in 3<sup>rd<\/sup> IEEE International Conference on Clean and Green Energy Engineering, August 2022<\/li>\n\n\n\n<li>H. Mohammed, F. Khalid, P. Sawyer, G. Cataloni and <strong><em>S. R. Hasan<\/em><\/strong>, \u201cInTrust-IoT: Intelligent Ecosystem based on Golden Dataset Free Power Profiling of Trusted device(s) in IoT for Hardware Trojan Detection\u201d, in Workshop on Hardware and Architectural Support for Security and Privacy (HASP), October, 2021.<\/li>\n\n\n\n<li>T. A. Odetola, <strong><em>S. R. Hasan<\/em><\/strong>, \u201cSoWaF: Shuffling of Weights and Feature Maps: A Novel Hardware Intrinsic Attack (HIA) on Convolutional Neural Network (CNN)\u201d, in IEEE International Symposium on Circuits and Systems\u2013ISCAS\u201921.<\/li>\n\n\n\n<li>H.&nbsp; Mohammed, T. A.&nbsp; Odetola, N.&nbsp; Guo, <strong><em>S. R.&nbsp; Hasan<\/em><\/strong>,&nbsp; \u201cDynamic Distribution of Edge Intelligence at the Node Level for Internet of Things\u201d, in 64th IEEE International MidWest Symposium on Circuits and Systems, 2021<\/li>\n\n\n\n<li>J. Nelson, T. A. Odetola, <strong><em>S. R. Hasan<\/em><\/strong>, \u201cWORDA: a Winograd Offline-Runtime Decomposition Algorithm for Faster CNN Inference\u201d, in 64th IEEE International MidWest Symposium on Circuits and Systems, 2021.<\/li>\n\n\n\n<li>A. Adeyemo, F. Khalid, T. A. Odetola, <strong><em>S. R. Hasan<\/em><\/strong> \u201cSecurity Analysis of Capsule Network Inference Using Horizontal Collaboration\u201d, in 64th IEEE International MidWest Symposium on Circuits and Systems, 2021.<\/li>\n\n\n\n<li>O Oderhohwo, H Mohammed, T. A. Odetola, T. Guo, <strong><em>S. R. Hasan<\/em><\/strong>, F. Dogbe, &#8220;An Edge Intelligence Framework for Resource Constrained Community Area Network&#8221;, in 63rd IEEE International MidWest Symposium on Circuits and Systems, 2020 (pp. 97 &#8211; 100).<\/li>\n\n\n\n<li>O Oderhohwo, H Mohammed, T. A. Odetola, <strong><em>S. R. Hasan<\/em><\/strong>, &#8221; Deployment of Object Detection Enhanced with Multi-label Multi-Classification on Edge Devices&#8221;, in 63rd IEEE International MidWest Symposium on Circuits and Systems, 2020 (pp. 986 &#8211; 989).<\/li>\n\n\n\n<li>H. Mohammed, T. A. Odetola, <strong><em>S. R. Hasan,<\/em><\/strong> S. Stissi, I. Garlinx, F. Awwad, &#8220;(HIADIoT): Hardware Intrinsic Attack Detection in Internet of Things; Leveraging Power Profiling&#8221;, in 62nd IEEE International MidWest Symposium on Circuits and Systems, 2019.<\/li>\n\n\n\n<li>M. Hailesellasie, J. Nelson, F. Khalid, <strong><em>S. R. Hasan<\/em><\/strong>, &#8220;VAWS: Vulnerability Analysis of Neural Networks using Weight Sensitivity&#8221;, in 62nd IEEE International MidWest Symposium on Circuits and Systems, 2019.<\/li>\n\n\n\n<li>M. Bima, I. Bhattacharya, <strong><em>S. R. Hasan<\/em><\/strong>, \u201cComparative Analysis of Magnetic Materials, Coil Structures and Shielding Materials for Efficient Wireless Power Transfer\u201d, in IEEE International Symposium on Electromagnetic Compatibility, Signal and Power Integrity, 2019.<\/li>\n\n\n\n<li>M. T. Hailesellasie, <strong><em>S. R. Hasan<\/em><\/strong>, O. A. Mohamed, \u201cMulMapper: Towards an Automated FPGA-Based CNN Processor Generator Based on a Dynamic Design Space Exploration\u201d, in International Symposium on Circuits and Systems (ISCAS, 2019).<\/li>\n\n\n\n<li>J. Zoodsma, J. Dean, S. Spry, J. Dickinson, <strong><em>S. R. Hasan<\/em><\/strong>, N. Guo, &#8221; An Intelligent and Secure Cloud Controlled Robotic Arm with Sensor Feedback Feature&#8221;, publication in IEEE SouthEast Conference, 2019<\/li>\n\n\n\n<li>A. Pasha, H. Ibrahim, <strong><em>S. R. Hasan<\/em><\/strong>, R. Belkacemi, F. Awwad, and O. Hasan, &#8220;A Utility Maximized Demand-Side Management for Autonomous Microgrid&#8221;, IEEE Electric Power and Energy Conference (EPEC-2018)<\/li>\n\n\n\n<li><strong><em>S. R. Hasan<\/em><\/strong>, Charles Kamhoua, Kevin Kwiat and Laurent Njilla, &#8220;A Novel Framework to Introduce Hardware Trojan Monitors Using Model Checking Based Counterexamples: Inspired by Game Theory&#8221; in IEEE International MidWest Symposium on Circuits and Systems, 2018<\/li>\n\n\n\n<li>H. Mohammed, J. Howell, <strong><em>S. R. Hasan<\/em><\/strong>, N. Guo, O. Elkeelany, &#8221; Hardware Trojan Based Security Issues in Home Area Network:&nbsp; A Testbed Setup&#8221;, in IEEE International MidWest Symposium on Circuits and Systems, 2018<\/li>\n\n\n\n<li>E. Oriero, <strong><em>S. R. Hasan<\/em><\/strong>, &#8220;All Digital Low Power Aging Sensor for Counterfeit Detection in Integrated Circuits&#8221;, in IEEE International MidWest Symposium on Circuits and Systems, 2018<\/li>\n\n\n\n<li>J. Shelley, H. Mohammed, L. Zink, <strong><em>S. R. Hasan<\/em><\/strong>, O. Elkeelany, &#8220;Covert Communication Channel Detection in Low-Power Battery Operated IoT Devices: Leveraging Power Profiles&#8221;, in IEEE SouthEast&nbsp; Conference,&nbsp; 2018<\/li>\n\n\n\n<li>M. T. Hailesellasie, <strong><em>S. R. Hasan<\/em><\/strong>, F. Khalid, M. Shafique, &#8220;FPGA-Based Convolutional Neural Network Architecture with Reduced Parameter Requirements&#8221;, in International Symposium on Circuits and Systems, ISCAS&#8217;2018<\/li>\n\n\n\n<li>F. Khalid, <strong><em>S. R. Hasan<\/em><\/strong>, S. Nanjiani, O. Hasan, M. Shafique, &#8220;Low Power Digital Clock Multipliers for Battery Operated Internet of Things (IoT) Devices&#8221;, in International Symposium on Circuits and Systems, ISCAS&#8217;2018<\/li>\n\n\n\n<li>A. Y. Salik, M. U. Sardar, O. Hasan, <strong><em>S. R. Hasan<\/em><\/strong>, and F. Awwad, &#8220;Formal Verification of Demand Response Based Home Energy Management Systems in Smart Grids&#8221;, in Innovative Smart-Grid Technologies &#8211; Asia, 2017<\/li>\n\n\n\n<li>O. Adegbite, <strong><em>S. R. Hasan<\/em><\/strong>, &#8220;A Novel Correlation Power Analysis Attack on PIC Based AES-128 without Access to Crypto-Device&#8221;, in IEEE International MidWest Symposium on Circuits and Systems, 2017<\/li>\n\n\n\n<li>F. K. Lodhi, <strong><em>S. R. Hasan<\/em><\/strong>, O. Hasan, F. Awwad, &#8221; Behavior Profiling of Power Distribution Networks for Runtime Hardware Trojan Detection&#8221;, in IEEE International MidWest Symposium on Circuits and Systems, 2017<\/li>\n\n\n\n<li><strong><em>S. R. Hasan<\/em><\/strong>, P. B. Tangellapalli, &#8220;Area Efficient Soft Error Tolerant RISC Pipeline: Leveraging Data Encoding and Inherent ALU Redundancy&#8221;, in IEEE International MidWest Symposium on Circuits and Systems, 2017<\/li>\n\n\n\n<li>M. T. Hailesellasie, <strong><em>S. R. Hasan<\/em><\/strong>, &#8220;A Fast FPGA-Based Deep Convolutional Neural Network Using Pseudo Parallel Memories&#8221;, in IEEE International Symposium on Circuits and Systems, 2017<\/li>\n\n\n\n<li>K. T. Tanweer, <strong><em>S. R. Hasan<\/em><\/strong>, A. M. Kamboh, &#8220;Motion Artifact Reduction from PPG Signals During Intense Exercise Using Filtered X-LMS&#8221;, in IEEE International Symposium on Circuits and Systems, 2017<\/li>\n\n\n\n<li>S. Kottler, M. Khayamy, <strong><em>S. R. Hasan<\/em><\/strong>, O. Elkeelany, &#8220;Formal Verification of Ladder Logic programs using NuSMV&#8221;, in IEEE SouthEast&nbsp; Conference,&nbsp; 2017<\/li>\n\n\n\n<li>F. K. Lodhi, <strong><em>S. R. Hasan<\/em><\/strong>, O. Hasan, F. Awwad, &#8220;Power Profiling of Microcontroller&#8217;s Instruction Set for Runtime Hardware Trojans Detection without Golden Circuit Models&#8221;, in IEEE\/ACM Conference on Design Automation and Test Europe (DATE), Lausanne, Switzerland, 2017<\/li>\n\n\n\n<li><strong><em>S. R. Hasan<\/em><\/strong>, Charles Kamhoua, Kevin Kwiat and Laurent Njilla, &#8220;Translating Circuit Behavior Manifestations of Hardware Trojans using Model Checkers into Run-time Trojan Detection Monitors&#8221;&nbsp; in IEEE Asian Hardware Oriented Security and Trust Symposium (AisanHOST), Taipei, Taiwan,&nbsp; 2016<\/li>\n\n\n\n<li>A. Mahmood, O. Hasan, H. R. Gillani, Y. Saleem, and <strong><em>S. R. Hasan<\/em><\/strong>, &#8220;Formal Reliability Analysis of Protective Systems in Smart Grids&#8221;, in IEEE Region 10 Symposium (TENSYMP), Bali, Indonesia, 2016<\/li>\n\n\n\n<li>W. Gul, <strong><em>S. R. Hasan<\/em><\/strong><em>,<\/em> O. Hasan, F. K. Lodhi, F. Awwad, &#8220;Synchronously Triggered GALS Design Templates Leveraging QDI Asynchronous Interface&#8221;,&nbsp;in IEEE international symposium of circuits and systems (ISCAS&#8217; 2016<\/li>\n\n\n\n<li>F. K. Lodhi, I. Abbasi&nbsp;, F. Khalid&nbsp;, O. Hasan, F. Awwad&nbsp;and <strong><em>S. R. Hasan<\/em><\/strong>, &#8220;A Self-learning Framework to Detect the Intruded Integrated Circuit&#8221;, in IEEE international symposium of circuits and systems (ISCAS&#8217; 2016)<\/li>\n\n\n\n<li>F. K. Lodhi, <strong><em>S. R. Hasan<\/em><\/strong>, O. Hasan, F. Awwad, \u201cFormal Analysis of Macro Synchronous Micro Asynchronous Pipeline for Hardware Trojan Detection\u201d, in IEEE Nordic Circuits and Systems Conference (NORCAS\u20192015)<\/li>\n\n\n\n<li><strong><em>S. R. Hasan<\/em><\/strong><strong>,<\/strong> S. F. Mossa, O. S. A. Elkeelany, F. Awwad, &#8220;Tenacious Hardware Trojans Due to High Temperature in Middle Tiers of 3-D ICs&#8221;, in MidWest Symposium on Circuit and Systems (MWSCAS&#8217;2015),&nbsp;August, 2015<\/li>\n\n\n\n<li><strong><em>S. R. Hasan<\/em><\/strong><strong>,<\/strong> S. F. Mossa, C. Junior, F. Awwad, &#8220;Hardware Trojans in Asynchronous FIFO-Buffers: From Clock Domain Crossing Perspective&#8221;, in MidWest Symposium on Circuit and Systems (MWSCAS&#8217;2015), August, 2015<\/li>\n\n\n\n<li>F. K. Lodhi, <strong><em>S. R. Hasan<\/em><\/strong>, O. Hasan, F. Awwad, &#8220;Hardware Trojan Detection in Soft Error Tolerant Macro Synchronous Micro Asynchronous (MSMA) Pipeline&#8221;, in MidWest Symposium on Circuits and Systems (MWSCAS&#8217;2014)<em>, <\/em>August, 2014<\/li>\n\n\n\n<li>W. Gul, <strong><em>S. R. Hasan<\/em><\/strong><em>,<\/em> O. Hasan, &#8220;Yield Aware Inter-Logic-Layer Communication in 3-D ICs: Early Design Stage Recommendations&#8221;, in MidWest Symposium on Circuits and Systems (MWSCAS&#8217;2014)<em>, <\/em>August, 2014<\/li>\n\n\n\n<li>G. B. Hamad, <strong><em>S. R. Hasan<\/em><\/strong><em>,<\/em> O. A. Mohamed, Y. Savaria, &#8220;Modeling, Analyzing, and Abstracting Single Event Transient Propagation at Gate Level&#8221;, in MidWest Symposium on Circuits and Systems (MWSCAS&#8217;2014), August, 2014<\/li>\n\n\n\n<li>F. K. Lodhi, <strong><em>S. R. Hasan<\/em><\/strong>, O. Hasan, F. Awwad, &#8220;Low Power Soft Error Tolerant Macro Synchronous and Micro Asynchronous Pipeline&#8221;, in IEEE International symposium on VLSI (ISVLSI&#8217; 2014), July 2014<\/li>\n\n\n\n<li>S. F. Mossa,<em> <strong>S. R. Hasan<\/strong>, <\/em>O. S. A. Elkeelany,<em> &#8220;<\/em>Introducing Redundant TSV with Low Inductance for 3-D IC &#8220;, in IEEE NEW Circuits and Systems Conference (NEWCAS&#8217; 2014)<em>, <\/em>June 2014<\/li>\n\n\n\n<li>W. Gul, <strong><em>S. R. Hasan<\/em><\/strong>, O. Hasan, &#8220;Clock Domain Crossing (CDC) for Inter-Logic-Layer Communication in 3-D ICs&#8221;, in IEEE NEW Circuits and Systems Conference (NEWCAS&#8217; 2014)<em>, <\/em>June 2014<\/li>\n\n\n\n<li>G. B. Hamad, <strong><em>S. R. Hasan<\/em><\/strong><em>,<\/em> O. A. Mohamed, Y. Savaria, \u201cAbstracting Single Event Transient Characteristics Variations Due to Input Patterns and Fan out&#8221;, in IEEE International Symposium of Circuit and Systems (ISCAS&#8217; 2014)<\/li>\n\n\n\n<li>G. B. Hamad, <strong><em>S. R. Hasan<\/em><\/strong>, O. A. Mohamed, Y. Savaria, \u201cInvestigating the Impact of Input Patterns, Propagation Paths, and Re-convergent Paths on The Propagation Induced Pulse Broadening\u201d, 2013 IEEE Conference on Radiation Effects on Components and Systems (RADECS\u2019 2013)<\/li>\n\n\n\n<li>P. B. Tangellapalli, <strong><em>S. R. Hasan<\/em><\/strong>, \u201cSoft Error Aware Pipelined Architecture: Leveraging Automatic Repeat Request Protocol\u201d, in 56th IEEE Mid-West Symposium on Circuits and Systems, MWSCAS\u20192013<\/li>\n\n\n\n<li>Z. Al-Bayati, O. A. Mohamed, <strong><em>S. R. Hasan<\/em><\/strong> and Y. Savaria, \u201cDesign of a C-Element Based Clock Domain Crossing Interface\u201d, in 24th IEEE\/ACM International Conference on Microelectronics (ICM 2012)<\/li>\n\n\n\n<li>P. B. Tangellapalli, <strong><em>S. R. Hasan<\/em><\/strong>, \u201cTowards Low Area Overhead ARQ Based Soft Error Tolerant Data Paths for SRAM-Based Altera FPGAs\u201d, in 55<sup>th<\/sup> IEEE Mid-West Symposium on Circuits and Systems, MWSCAS\u20192012<\/li>\n\n\n\n<li>F. K. Lodhi, <strong><em>S. R. Hasan<\/em><\/strong>, O. Hasan, F. Awwad, \u201cModified Null Convention Logic Pipeline to Detect Soft Errors in Both Null and Data Phase\u201d, in55<sup>th<\/sup> IEEE Mid-West Symposium on Circuits and Systems, MWSCAS\u20192012<\/li>\n\n\n\n<li>&nbsp;G. B. Hamad, O. A. Mohamed, <strong><em>S. R. Hasan<\/em><\/strong>, Y. Savaria, \u201c Identification of Soft-Error Glitch-Propagation Paths: Leveraging SAT solvers,\u201d in IEEE International Symposium for Circuits and Systems, ISCAS\u20192012<\/li>\n\n\n\n<li>&nbsp;Z. Al-bayati, <strong><em>S. R. Hasan<\/em>,<\/strong> O. A. Mohamed, Y. Savaria, \u201cA Novel Hybrid FIFO Asynchronous Clock Domain Crossing Interfacing Method,\u201d in 22<sup>nd<\/sup> Edition of ACM\/IEEE Great Lake Symposium on VLSI, GLSVLSI\u20192012<\/li>\n\n\n\n<li>G. B. Hamad, O. A. Mohamed, <strong><em>S. R. Hasan<\/em><\/strong>, Y. Savaria, \u201cSEGP-Finder: Tool for Identification of Soft Error Glitch-Propagating Paths at Gate Level\u201d, in 18<sup>th<\/sup> IEEE International Conference on Electronics Circuits and Systems, December, 2011<\/li>\n\n\n\n<li>N. Sharif, N. Ramzan, F. K. Lodhi, O. Hasan, and <strong><em>S. R. Hasan<\/em><\/strong><em>, <\/em>\u201cQuantitative Analysis of State-of-the-Art Synchronizers: Clock Domain Crossing Perspective\u201d, in IEEE International Conference on Emerging Technologies, September 2011<\/li>\n\n\n\n<li><strong><em>S. R. Hasan<\/em><\/strong>, B. Pontikakis, Y. Savaria,<strong> \u201c<\/strong>An all-digital skew-adaptive clock scheduling algorithm for multiprocessor systems on chips (MPSoCs)\u201d, in International Symposium on Circuits and Systems (ISCAS 2009), Taipei, Taiwan, May 2009, pp. 2501 \u2013 2504<\/li>\n\n\n\n<li><strong><em>S. R. Hasan<\/em><\/strong>, N. Belanger, Y. Savaria, \u201cAll-digital skew-tolerant interfacing method for systems with rational frequency ratios among Multiple Clock Domains: leveraging a priori timing information\u201d, in 1<sup>st<\/sup> Microsystems and Nano electronics Research Conference (MNRC 2008) Ottawa, Canada, October 2008, pp. 129 \u2013 132<\/li>\n\n\n\n<li><strong><em>S. R. Hasan<\/em><\/strong>, Y. Savaria, \u201cMetastability tolerant mesochronous synchronization\u201d, in 50<sup>th<\/sup> MidWest Symposium on Circuits &amp; Systems, (MWSCAS 2007), Montreal, Canada, August 2007, pp. 13 \u2013 16<\/li>\n\n\n\n<li><strong><em>S. R. Hasan<\/em><\/strong>, Yvon Savaria, \u201cCrosstalk effects in event-driven self-timed circuits designed with 90nm CMOS technology\u201d, in International Symposium on Circuits and Systems (ISCAS 2007), New Orleans, USA, May 2007, pp. 629 \u2013 632<\/li>\n\n\n\n<li><strong><em>S. R. Hasan<\/em><\/strong>, Y. Savaria, M. Nekili, \u201cSplit H-tree design method for high-performance GALS systems\u201d, in 4<sup>th<\/sup> Northeast Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Canada, June, 2006, pp. 161 \u2013 164<\/li>\n\n\n\n<li><strong><em>S. R. Hasan<\/em><\/strong>, A. Landry, Y. Savaria, M. Nekili, \u201cDesign constraints of a HyperTransport-compatible network-on-chip\u201d, in 2<sup>nd<\/sup> Northeast Workshop on Circuits and Systems (NEWCAS 2004), Montreal, Canada, June, 2004, pp. 269 \u2013 272<\/li>\n\n\n\n<li>A. Upadhyay, <strong><em>S. R. Hasan<\/em><\/strong>, M. Nekili, \u201cOptimal partitioning of globally asynchronous locally synchronous processor array\u201d, in the 2004 Great Lakes Symposium on VLSI (GLSVLSI 2004), Boston, USA, April 2004, pp. 7 \u2013 12<\/li>\n\n\n\n<li>A. Upadhyay, <strong><em>S. R. Hasan<\/em><\/strong>, M. Nekili, \u201cA novel asynchronous wrapper using1-0f-4 data encoding and single-track handshaking\u201d, in 2<sup>nd<\/sup> Northeast Workshop on Circuits and Systems (NEWCAS 2004), Montreal, Canada, June, 2004, pp. 205 \u2013 208<\/li>\n<\/ol>\n\n\n\n<p><strong>Selected Presentations:<\/strong><\/p>\n\n\n\n<ol style=\"list-style-type:1\" class=\"wp-block-list\">\n<li>Lecture presented by <strong><em>S. R. Hasan <\/em><\/strong>to elaborate on the research paper with his graduate student and collaborators, paper is titled as, \u201cTowards Achieving Moving Target Defense via Dynamically Changing the Layout of ROPUF\u201d, in IEEE 68th International Midwest Symposium on Circuits and Systems (MWSCAS)- August, 2025 \u2013 the co-authors are A. Perkins, W. Al Amiri.<\/li>\n\n\n\n<li>Poster presented by <strong><em>S. R. Hasan <\/em><\/strong>to elaborate on the research paper with my students and collaborators, paper is titled as \u201cQuickest Attempt Attack (QuAck) Against Randomized KF Innovations-based Detection in AVs with Integrated GPS-IMU\u201d, in IEEE 68th International Midwest Symposium on Circuits and Systems (MWSCAS)- August, 2025, the co-authors are- M. Mahmoud, W. Al Amiri, T. N. Guo.<\/li>\n\n\n\n<li>Poster presented by <strong><em>S. R. Hasan<\/em><\/strong> to elaborate on the research paper with my students and research collaborators, paper is titled as \u201cRealistic GPS Spoofing Via Customized CARLA GPS Navigation and Controller Systems\u201d, in IEEE 68th International Midwest Symposium on Circuits and Systems (MWSCAS)- August, 2025, the co-authors are &#8211; T. Robertson, W. Al Amiri, A. Solanki, and T. N. Guo.<\/li>\n\n\n\n<li>Poster presented by <strong><em>S. R. Hasan <\/em><\/strong>to elaborate on the research paper with my students &#8211; Y. R. Martinez, C. Brady, A. Solanki, and my colleagues W. Al Amiri, T. N. Guo, on the paper titeld as \u201cMitigation of Camouflaged Adversarial Attacks in Autonomous Vehicles\u2013A Case Study Using CARLA Simulator\u201d, in 2025 IEEE International Symposium on Circuits and Systems (ISCAS), 2025.<\/li>\n\n\n\n<li>Lecture presented by <strong><em>S. R. Hasan <\/em><\/strong>to elaborate on the research paper with his MS students and external collaborators, paper is titled as, \u201cDetection and Mitigation of Subtle Feature-map Attacks in Pseudo Parallel Collaborative CNN Models for Distributed Edge Intelligence\u201d, Vehicular Technology Conference (VTC-2024) \u2013 the authors are P. Patel, S. R. Hasan, M. A. Rahman\u2020, S. Homsi<\/li>\n\n\n\n<li>Poster presented by S. R. Hasan to elaborate on the research paper with his PhD students, paper is titled as \u201cLaBaNI: Layer-based Noise Injection Attack on Convolutional Neural Networks\u201d, published in IEEE\/ACM Great Lake Symposium on VLSI, June 2022.<\/li>\n\n\n\n<li>Poster presented by <em>S. R. Hasan<\/em> to elaborate on the research paper with my students. The details of the paper are as follows, title &#8211; &#8220;VAWS: Vulnerability Analysis of Neural Networks using Weight Sensitivity&#8221;, published in 62nd IEEE International MidWest Symposium on Circuits and Systems, 2019, by M. Hailesellasie, J. Nelson, F. Khalid, S. R. Hasan<\/li>\n\n\n\n<li>Lecture presented by <em>S. R. Hasan<\/em> on the paper titled as &#8220;A Novel Framework to Introduce Hardware Trojan Monitors Using Model Checking Based Counterexamples: Inspired by Game Theory&#8221;, by S. R. Hasan, Charles Kamhoua, Kevin Kwiat and Laurent Njilla. in IEEE International MidWest Symposium on Circuits and Systems, 2018<\/li>\n\n\n\n<li>Lecture presented by <em>S. R. Hasan<\/em>, &#8220;All Digital Low Power Aging Sensor for Counterfeit Detection in Integrated Circuits&#8221;, having authors E. Oriero, and S. R. Hasan, in IEEE International MidWest Symposium on Circuits and Systems, 2018<\/li>\n\n\n\n<li>Lecture presented by <em>S. R. Hasan<\/em> to elaborate on the research paper, &#8220;A Novel Correlation Power Analysis Attack on PIC Based AES-128 without Access to Crypto-Device&#8221;, by O. Adegbite, S. R. Hasan, in IEEE International MidWest Symposium on Circuits and Systems, Boston, MA, 2017.<\/li>\n\n\n\n<li>Lecture presented by <em>S. R. Hasan<\/em> to elaborate on the research paper, &#8221; Behavior Profiling of Power Distribution Networks for Runtime Hardware Trojan Detection&#8221;, by F. K. Lodhi, S. R. Hasan, O. Hasan, F. Awwad, in IEEE International MidWest Symposium on Circuits and Systems, Boston, MA, 2017<\/li>\n\n\n\n<li>Lecture presented by <em>S. R. Hasan<\/em> on \u201cTowards Run-Time Hardware Trojan Detection Using Circuit Behavior Profiling: Leveraging Game Theory and Formal Verification\u201d, in 3<sup>rd<\/sup> annual colloquium&nbsp; on Game Theory at Air Force Research Lab (AFRL), Rome, NY \u2013 July 2016<\/li>\n\n\n\n<li>Invited lecture by <em>S. R. Hasan<\/em> on \u201cDigital Hardware Design Security\u201d, at National University of Science and Technology (NUST), Islamabad, Pakistan \u2013 May 2016<\/li>\n\n\n\n<li>Invited lecture by <em>S. R. Hasan<\/em> on \u201cTowards Run-Time Hardware Trojan Detection Using Circuit Behavior Profiling: Leveraging Formal Verification\u201d, at Florida Polytechnic University, Lakeland, FL \u2013 January 2016<\/li>\n\n\n\n<li>Poster presented by <em>S. R. Hasan <\/em>on \u201cTenacious Hardware Trojans Due to High Temperature in Middle Tiers of 3-D ICs\u201d, an extended abstract in Design Automation Conference (DAC), 2015 (The co-authors are S. F. Mossa, O. S. A. Elkeelany)<\/li>\n\n\n\n<li>Lecture presented by <em>S. R. Hasan<\/em> to elaborate on the research paper, &#8220;Hardware Trojan Detection in Soft Error Tolerant Macro Synchronous Micro Asynchronous (MSMA) Pipeline&#8221;, by F. K. Lodhi, <em>S. R. Hasan<\/em>, O. Hasan, F. Awwad, in MidWest Symposium on Circuits and Systems (MWSCAS&#8217;2014)<em>, <\/em>August, 2014<\/li>\n\n\n\n<li>Lecture presented by <em>S. R. Hasan<\/em> to elaborate on the research paper, &#8220;Modeling, Analyzing, and Abstracting Single Event Transient Propagation at Gate Level&#8221;, by G. B. Hamad, <em>S. R. Hasan,<\/em> O. A. Mohamed, Y. Savaria, in MidWest Symposium on Circuits and Systems (MWSCAS&#8217;2014), &nbsp;August, 2014<\/li>\n\n\n\n<li>Poster presented by <em>S. R. Hasan <\/em>to elaborate on the research paper, &#8220;Yield Aware Inter-Logic-Layer Communication in 3-D ICs: Early Design Stage Recommendations&#8221;, by W. Gul, <em>S. R. Hasan,<\/em> O. Hasan, in MidWest Symposium on Circuits and Systems (MWSCAS&#8217;2014)<em>, <\/em>August, 2014<\/li>\n\n\n\n<li>Lecture presented by <em>S. R. Hasan<\/em> to elaborate on the research paper, &#8220;Low Power Soft Error Tolerant Macro Synchronous and Micro Asynchronous Pipeline&#8221;, by F. K. Lodhi, <em>S. R. Hasan<\/em>, O. Hasan, F. Awwad, in IEEE International symposium on VLSI (ISVLSI&#8217; 2014), July 2014<\/li>\n\n\n\n<li>Lecture presented by <em>S. R. Hasan<\/em> to elaborate on the research paper, &#8220;Clock Domain Crossing (CDC) for Inter-Logic-Layer Communication in 3-D ICs&#8221;, by W. Gul, <em>S. R. Hasan<\/em>, O. Hasan, in IEEE NEW Circuits and Systems Conference (NEWCAS&#8217; 2014)<em>, <\/em>June 2014<\/li>\n\n\n\n<li>Poster presented by <em>S. R. Hasan <\/em>to elaborate on the research paper, <em>&#8220;<\/em>Introducing Redundant TSV with Low Inductance for 3-D IC &#8220;, by S. F. Mossa,<em> S. R. Hasan, <\/em>O. S. A. Elkeelany,in IEEE NEW Circuits and Systems Conference (NEWCAS&#8217; 2014)<em>, <\/em>June 2014<\/li>\n\n\n\n<li>Lecture presented by <em>S. R. Hasan<\/em> to elaborate on the research paper \u201cSoft Error Aware Pipelined Architecture: Leveraging Automatic Repeat Request Protocol\u201d, by P. B. Tangellapalli and <em>S. R. Hasan,<\/em> in 56th IEEE Mid-West Symposium on Circuits and Systems, MWSCAS\u20192013, Columbus, OH<strong><\/strong><\/li>\n\n\n\n<li>Poster presented by <em>S. R. Hasan <\/em>to elaborate on the research paper, \u201cTowards Low Area Overhead ARQ Based Soft Error Tolerant Data Paths for SRAM-Based Altera FPGAs\u201d, by P. B. Tangellapalli and <em>S. R. Hasan,<\/em> in 55<sup>th<\/sup> IEEE Mid-West Symposium on Circuits and Systems, MWSCAS\u20192012<\/li>\n\n\n\n<li>Poster presented by <em>S. R. Hasan <\/em>to elaborate on the research paper, \u201cModified Null Convention Logic Pipeline to Detect Soft Errors in Both Null and Data Phase\u201d, by F. K. Lodhi et. al. in 55<sup>th<\/sup> MWSCAS\u20192012, Boise, Idaho<\/li>\n\n\n\n<li>Poster presented by <em>S. R. Hasan <\/em>to elaborate on the research paper, \u201cA Novel Hybrid FIFO Asynchronous Clock Domain Crossing Interfacing Method\u201d, by Z. Al-bayati, <em>S. R. Hasan<\/em>, O. A. Mohamed, and Y. Savaria, in 22<sup>nd<\/sup> Edition of ACM\/IEEE Great Lake Symposium on VLSI, GLSVLSI\u20192012, Salt Lake City, Utah<\/li>\n\n\n\n<li>A presentation by S. R. Hasan on \u201cTowards Soft Error Rate Estimation in SRAM-Based FPGA Designs\u201d, during the kick-off meeting for the project of Cosmic Radiation and effect on aircraft system: a research project conducted by Consortium for Research and Innovation in Aerospace in Quebec, February 2011, Montreal, QC<\/li>\n\n\n\n<li>A presentation by <em>S. R. Hasan<\/em> on \u201cRadiation Induced Single Event Effects in Modern Avionics\u201d, to provide awareness about growing radiation hazards to commercial airplane industry, October 2009, Montreal, QC<\/li>\n\n\n\n<li>Poster presented by <em>S. R. Hasan <\/em>to elaborate on the abstract, \u201cUnderstanding the radiation hazards in integrated circuits at airplane flying altitudes\u201d, by <em>S. R. Hasan,<\/em> N. B\u00e9langer, Y. Audet, Y. Savaria, C. Thibeault, in CANEUS Fly-By-Wireless Workshop 2009,&nbsp; (FBW 2009), June 2009, Montreal, QC, Canada<\/li>\n\n\n\n<li>A presentation by <em>S. R. Hasan<\/em> on \u201cIntroduction to Radiation Hazards in Integrated Circuits and Modeling Approaches\u201d, in a meeting of a joint project among aero-space industry and academia, March 2009, Montreal, Canada<\/li>\n\n\n\n<li>Poster presented by <em>S. R. Hasan<\/em> to elaborate on the research paper \u201cAll-digital skew-tolerant interfacing method for systems with rational frequency ratios among multiple clock domains: leveraging a priori timing information\u201d, by <em>S. R. Hasan<\/em>, N. Belanger, Y. Savaria, in Microsystems and Nano electronics Research Conference (MNRC 2008), Canada.<\/li>\n\n\n\n<li>Lecture presented by <em>S. R. Hasan<\/em> <strong>to elaborate on the research paper <\/strong>\u201cMetastability tolerant mesochronous synchronization\u201d, by <em>S. R. Hasan<\/em>, Y. Savaria, in 50<sup>th<\/sup> MWSCAS 2007, Montreal, Canada, August 2007<\/li>\n\n\n\n<li>Lecture presented by <em>S. R. Hasan<\/em> on \u201cA H-tree Splitting Method for High-Performance GALS-Based SoCs\u201d, during a seminar conducted by ECE Department, Concordia University, Montreal, Canada, November, 2005<\/li>\n\n\n\n<li><strong>Poster presented by <em>S. R. Hasan<\/em> to elaborate on the research paper <\/strong>\u201cSplit H-tree design method for high-Performance GALS Systems\u201d, by <em>S. R. Hasan<\/em>, Y. Savaria, M. Nekili, in 4<sup>th<\/sup> Northeast Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Canada, June, 2006<\/li>\n\n\n\n<li>Lecture presented by <em>S. R. Hasan<\/em> <strong>to elaborate on the research paper <\/strong>\u201cDesign constraints of a HyperTransport-compatible network-on-chip\u201d, by <em>S. R. Hasan<\/em>, A. Landry, Y. Savaria, M. Nekili, in 2<sup>nd<\/sup> NEWCAS 2004, Canada<\/li>\n\n\n\n<li><strong>Poster presented by <em>S. R. Hasan<\/em> to elaborate on the research paper<\/strong> \u201cA novel asynchronous wrapper using1-of-4 data encoding and single-track handshaking\u201d, by Upadhyay, <em>S. R. Hasan<\/em>, M. Nekili, in 2<sup>nd<\/sup> NEWCAS 2004, Canada<\/li>\n<\/ol>\n\n\n\n<p><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Refereed Journal Articles: Listing of my Peer Reviewed Conference Papers: Selected Presentations:<\/p>\n","protected":false},"author":99,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-38","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/sites.tntech.edu\/shasan\/wp-json\/wp\/v2\/pages\/38","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/sites.tntech.edu\/shasan\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/sites.tntech.edu\/shasan\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/sites.tntech.edu\/shasan\/wp-json\/wp\/v2\/users\/99"}],"replies":[{"embeddable":true,"href":"https:\/\/sites.tntech.edu\/shasan\/wp-json\/wp\/v2\/comments?post=38"}],"version-history":[{"count":17,"href":"https:\/\/sites.tntech.edu\/shasan\/wp-json\/wp\/v2\/pages\/38\/revisions"}],"predecessor-version":[{"id":127,"href":"https:\/\/sites.tntech.edu\/shasan\/wp-json\/wp\/v2\/pages\/38\/revisions\/127"}],"wp:attachment":[{"href":"https:\/\/sites.tntech.edu\/shasan\/wp-json\/wp\/v2\/media?parent=38"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}